This invention relates generally to semiconductor memory devices and, particularly, to antifuse structures which decrease resistance by applying a voltage above a prescribed threshold value.
Referring to FIGS. 11 and 12, antifuses of the prior art, as disclosed for example in Hollingsworth, U.S. Pat. No. 4,748,490 and Gordon et al., U.S. Pat. No. 4,914,055, the disclosures of which are hereby incorporated by reference, are produced by applying polycrystalline silicon layer 3 having a high concentration of conductive impurity on oxide film 2a formed on semiconductor substrate 1. Layer 3 is covered with protective insulator film 2b having opposing openings a, b. A semi-insulating amorphous silicon layer 4 is applied in opening a. Metal barrier layer 5a is sandwiched between layer 4 and aluminum electrode 6a. Metal barrier layer 5b is applied directly in opening b and aluminum electrode 6b is positioned on layer 5b.
When a program voltage, i.e. a voltage greater than a prescribed threshold value, is applied between electrodes 6a and 6b, dielectric breakdown occurs in layer 4. A portion of layer 3 fuses along the breakdown path. As a result, electrical resistance of the fuse is reduced where dielectric breakdown has occurred, thus forming a conductive path having a prescribed conductivity within a low voltage range.
Referring to FIG. 9, in prior art antifuses dielectric breakdown voltage, indicated by a dot (.cndot.), depends on the polarity of the applied voltage as depicted by the illustrated I-V characteristic. Since program voltage and resistance following programming depend on the polarity of the antifuse when installed in the semiconductor memory device, the antifuse cannot be reliably programmed without attention inconveniently directed to such initial polarity. As a result, the antifuse can not be conveniently used bi-directionally.
The present invention solves these and other problems of prior art antifuses by providing a bi-directional antifuse which eliminates or reduces aberrations resulting from the alternative directionality of the program voltage.